Data is normally written to a writable optical disk using a fixed and stable clock such as crystal, a frequency synthesizer or the like. This holds true with all formats such as a CAV format in which the number of rotations and the transfer rate are constant on the whole surface of a disk, a ZCAV format in which the number of rotations is constant while the transfer rate depends on the radius of a disk, a ZCLV format in which the number of rotations depends on the radius of a disk while the transfer rate is constant.
Among the above mentioned formats, the ZCLV format is adopted for a phase shift optical disk such as DVD-RAM, because the linear speed for storage is an important factor of the storage characteristic, and data cannot be normally stored unless the linear speed is in a predetermined range.
Thus, access for storage in the ZCLV format as mentioned above largely depends on the settings of a motor. Therefore, the access for storage has been improved by allowing a storage clock to follow the change in the operation of a motor.
The physical disk format for the DVD-RAM is described in the DVD-RAM standards (DVD Specifications for Rewritable Disc, Part 1: PHYSICAL SPECIFIC ACTIONS Ver. 1.0).
In the DVD-RAM format, wobbling is applied to the guide groove of a disk at a frequency of one 186th of the channel rate of data. The wobbling is a reference signal. A channel clock is generated by a phase synchronization loop (PLL) for multiplying the frequency element by 186, and the storage and read system is configured based on the channel rate variable depending of the rotation state of the disc, thereby improving the access time and the like of the system.
When data is read, it is necessary to generate a gate for correctly indicating the starting position of an address area and address data, the starting position of stored data, and the like. A channel clock generated at the above mentioned PLL is set as a clock for generation of a gate so that a gate can be correctly and correspondingly generated even when the rotation state of a motor changes and a channel rate also changes.
In addition, when data is written to a disk, it is necessary to store the correct length of data at a correct position by absorbing a channel rate error caused by a motor rotation error and a disk center error. In this case, correct data can be written by generating storage data using a channel clock generated based on the PLL as a storage clock as a countermeasure against a motor rotation error and a disk center error.
With an optical disk in the above mentioned ZCLV system, well-known jitter-free read and jitter-free storage have been utilized so that data can be read and stored even in a state where the motor acceleration is high and the transfer rate is changing, thereby to improve the access speed for storage and reading.
Furthermore, to increase a storage capacity, a higher storage density and a higher frequency storage clock have been developed.
Under the situation, a high-speed PLL characteristic should be guaranteed to proceed with high-speed motor acceleration.
In addition, it is also necessary for the PLL to generate a clock with high frequency precision by standing the disturbance, being stable at a low speed with little possible clock jitter when data is stored.
That is, a PLL is required to be a fast-response PLL for proceeding with the changing speed of a high-speed motor and a slow-response PLL for generating a stable storage clock.